uCLinux on DE2-115

Johan Granath has written in with a special treat for everyone: booting uLinux on the DE2-115! For those that have not touched this brand of linux as yet, uCLinux is a special distribution of Linux intended for microcontrollers (http://www.uclinux.org/). The document listed below a step-by-step instruction how to set up a Nios 2 CPU system with MMU for use with uCLinux, written in VHDL with an Avalon bus and kernel module to interface with custom user hardware, and updated to be built with Qsys.

DE2-115 with Cyclone IV E

For more the full documentation, see this link: http://uuoc.org/uClinux_nios2_custom_hardware.pdf.

From Jose Pablo Pinilla and Alfredo Gualdrón of the Universidad Pontificia Bolivariana Colombia, we have a new paper featuring research based on realizing a configurable platform for emulation of different computer architectures, known as XISCKER (Reduced and Complex Instruction Set Computing Key Educational Resources).

This is a project planned to illustrate the structure and operational foundations of Central Processing Units, through the implementation of a configurable system with two processors, one RISC (Reduced Instruction Set Computing) and one CISC (Complex Instruction Set Computing), on an FPGA (Field Programmable Gate Array), along with a programming and monitoring user interface software.

Computer Architecture embraces all three aspects of a processor design: instruction set, functional estructure and hardware implementation. The main architectures are RISC (Reduced Instruction Set Computing) and CISC (Complex Instruction Set Computing) which led to x86 as we still recognize now. Both designs bring electronics or computer science students the basic concepts they should learn.

Therefore, this project brings an opportunity to learn this basic concepts through the HDL description in Verilog of two processors (One for each architecture) implemented on FPGA devices (Xilinx and Altera), together with strong documentation, common assembly language instructions and support software.

A RISC processor instruction set and organization is designed so that it represents this architecture’s characteristics, such as: A large amount of registers, few Instructions of the same width and logical-arithmetic operations only between registers.
This processor’s structure is similar to the Multi-cycle MIPS described by Patterson and Hennessy [1] in order to facilitate the change between this system and a commercial MIPS-based processor in terms of code compatibility and structural behavior.

This CISC processor is based on the instruction set of the Motorola (now Freescale) HC08 and HC11 series which symbolizes the characteristics of CISC Architecture, with features like: Small set of registers with specific purposes, several addressing modes and therefore a large amount of instructions with different widths. Figure 3 contains a diagram that represents the main units and signals of this processor.

The X-ISCKER platform delivers the Verilog HDL description of two processors, an IDE software and the documentation that will allow new learners to familiarize with computer architecture foundations, and computer designers to come up with custom embedded processor solutions to their applications.

For more information and source code, please visit http://semilleroadt.upbbga.edu.co/xiscker.

Altera Corporation (Nasdaq: ALTR) has announced that Terasic Technologies, Inc., is now an official Altera Global Kit Reseller, giving Terasic the capability to

market and distribute all Altera official development kits. Altera’s development kits comprise of programmable hardware design solutions that span the entire Altera family, including the low-power, cost-efficient MAX CPLDs up to top-of-the-line Stratix FPGAs. For the full range of Altera kit solutions, please visit http://altera-kits.terasic.com .

Terasic was founded in 2003 with the goal of providing educational programmable development kits that emphasized real-world applications, helping drive the success of the Altera University Program with the line of extremely popular Development and Education (DE) boards. Since then, Terasic has expanded its design applications to various fields such as prototyping, industrial, medical, financial, and more. As of 2007, Terasic has also established itself as the official manufacturing partner – and sometimes designer – for Altera kits as well.

Terasic’s success lies in the ability to provide full-bundle customized solutions , combining development kits with an assortment of daughter cards which focus on a wide range of applications including networking, storage, multimedia, interface conversion, and AD/DA. For the full list of daughter cards, please visit http://cards.terasic.com . With over 30 available daughter cards, engineers have access to hundreds of different configurations to fully meet their project specifications and requirements.

Alongside hardware, Terasic also provides open-source IP that is packaged with every product, allowing users to set up a fully functional design without having to touch any code. In addition, bundled with every kit is system generation software that

allows for easy selection of daughter cards to generate a top-level design in seconds, without the need for tedious pin assignments. The software allows for the customers to focus on what’s truly important – design.

“By enabling Terasic to become a formal reseller of Altera development kits, customers will be buying from a company that already has extensive experience in this field, a company that really cares about the success and satisfaction of world-wide development kit users,” states Terasic CEO Sean Peng. Mr. Peng further added, “Given our manufacturing partnership with Altera, our knowledge of the products is through and through, allowing us to provide the absolute best technical support for customers.”

With the newly announced partnership as a Global Kit Reseller, Terasic aims to leverage its expertise in providing bundle solutions to the existing base of consumers, as well as capture new markets. The addition of Altera development kits will enable an even more robust set of solutions and applications. Terasic hopes to benefit customers with its “one-stop shop” philosophy, broad development kit experience, and professional, dedicated support.

Terasic today announced that EDN has named Terasic’s Stratix V FPGA Development Kits as one of the “100 Hot Products of 2012”. The 2012 EDN Hot 100 highlights the electronics industry’s most significant products of the year based on innovation, significance, usefulness, and popularity.

To fulfill the design needs that demand high speed, advanced memory interfacing, and the highest logic capacity, Terasic has just announced a host of new FPGA boards for tackling high-bandwidth applications such as high frequency trading, data acquisition, networking, and signal processing.

The boards come in three flavors: the TR5-Lite , which features a conveniently small form-factor; the DE5-NET , which maximizes memory, speed, and bandwidth capabilities; and the TR5-F40W , which promotes flexibility and feature expansion.

“As future high frequency trading and networking applications are leaning towards utilizing FPGAs with high-bandwidth memory architectures, Terasic aims to leverage its proximity to high-quality manufacturers to deliver cost-competitive state-of-the-art solutions for today’s high performance computing and finance industry,” states Terasic CEO Sean Peng.

See more

If you’ve never had the chance to stop by Cornell’s ECE5760 page, please do so now. Lead by lecturer Bruce Land, the ECE 5760 page is one of the most expansive resources on FPGA design. Not only does it list out curriculum of the course including reading materials and lab assignments, Bruce Land has also cataloged student final projects since 2006. That’s around the time the first DE2 came out! The student projects themselves are extremely thorough, including full project descriptions to source files for download! And every year, we get to see more amazing projects from the brilliant students of this class. Below, we can see some awesome projects developed over the past few years…

Falling Sand Game

Motion Pong

Game of Life

The loveable little DE0-Nano is getting a mini upgrade – courtesy to our friends over at Spansion!

The exact upgrade will be to the EPCS flash memory serial configuration device. The previous part was a 16Mb flash device, but will now be upgraded to a heftier 64Mb device, the S25FL064, from Spansion, which will have the exact same properties as the old Altera EPCS device, but with higher density.

Can you notice the difference?